"A 64-Mb DRAM with meshed power line."

Toshio Yamada et al. (1991)

> Home

Details and statistics

DOI: 10.1109/4.98965

access: closed

type: Journal Article

metadata version: 2025-02-26

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/YamadaNHASSMYMOI91
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/YamadaNHASSMYMOI91
Toshio Yamada, Yoshiro Nakata, Junko Hasegawa, Noriaki Amano, Akinori Shibayama, Masaru Sasago, Naoto Matsuo, Toshiki Yabu, Susumu Matsumoto, Shozo Okada, Michihiro Inoue:
A 64-Mb DRAM with meshed power line. IEEE J. Solid State Circuits 26(11): 1506-1510 (1991)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.