"A 286 mm² 256 Mb DRAM with ×32 both-ends DQ."

Yohji Watanabe et al. (1996)

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DOI: 10.1109/4.499734

access: closed

type: Journal Article

metadata version: 2022-07-26

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  - https://dblp.org/rec/journals/jssc/WatanabeWKKDRYM96
Yohji Watanabe, Ring Wong, Toshiaki Kirihata, Daisuke Kato, John K. DeBrosse, Takahiko Rara, Munehiro Yoshida, Rideo Mukai, Khandker N. Quader, Takeshi Nagai, Peter Poechmueller, Peter Pfefferl, Matthew R. Wordeman, Shuso Fujii:
A 286 mm² 256 Mb DRAM with ×32 both-ends DQ. IEEE J. Solid State Circuits 31(4): 567-574 (1996)

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