"Fast adders using enhanced multiple-output domino logic."

Zhongde Wang et al. (1997)

> Home

Details and statistics

DOI: 10.1109/4.551912

access: closed

type: Journal Article

metadata version: 2022-07-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/WangJMWB97
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/WangJMWB97
Zhongde Wang, Graham A. Jullien, William C. Miller, Jinghong Wang, Sami S. Bizzan:
Fast adders using enhanced multiple-output domino logic. IEEE J. Solid State Circuits 32(2): 206-214 (1997)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.