"AC-and DC-powered subnanosecond 1-kbit Josephson cache memory design."

Yoshifusa Wada et al. (1988)

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DOI: 10.1109/4.343

access: closed

type: Journal Article

metadata version: 2024-11-05

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Yoshifusa Wada, Mutsuo Hidaka, Shuichi Nagasawa, Ichiro Ishida:
AC-and DC-powered subnanosecond 1-kbit Josephson cache memory design. IEEE J. Solid State Circuits 23(4): 923-932 (1988)

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