"A 46-ns 1-Mbit CMOS SRAM."

Hiroshi Shimada et al. (1988)

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DOI: 10.1109/4.256

access: closed

type: Journal Article

metadata version: 2024-11-05

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Hiroshi Shimada, Shoichiro Kawashima, Hideo Itoh, Noriyuki Suzuki, Takashi Yabu:
A 46-ns 1-Mbit CMOS SRAM. IEEE J. Solid State Circuits 23(1): 53-58 (1988)

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