![](https://dblp.uni-trier.de./img/logo.320x120.png)
![search dblp search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de./img/search.dark.16x16.png)
default search action
"A 20-Gb/s flip-flop circuit using direct-coupled FET logic."
Makoto Shikata et al. (1993)
- Makoto Shikata, Koutarou Tanaka, Hiromi T. Yamada, Hiroki I. Fujishiro, Seiji Nishi, Chouho Yamagishi, Masahiro Akiyama:
A 20-Gb/s flip-flop circuit using direct-coupled FET logic. IEEE J. Solid State Circuits 28(10): 1046-1051 (1993)
![](https://dblp.uni-trier.de./img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.