"A 32 kbyte integrated cache memory."

Kazuhiro Sawada et al. (1989)

> Home

Details and statistics

DOI: 10.1109/4.34065

access: closed

type: Journal Article

metadata version: 2024-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/SawadaSNSTIMMFMKAHMS89
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/SawadaSNSTIMMFMKAHMS89
Kazuhiro Sawada, Takayasu Sakurai, Kazutaka Nogami, Tsukasa Shirotori, Toshinari Takayanagi, Tetsuya Iizuka, Takeo Maeda, Jinichi Matsunaga, Hiromichi Fuji, Kenji Maeguchi, Kiyoshi Kobayashi, Tomoyuki Ando, Yoshiki Hayakashi, Akio Miyoshi, Kazuyuki Sato:
A 32 kbyte integrated cache memory. IEEE J. Solid State Circuits 24(4): 881-888 (1989)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.