"The use of RTL descriptions in accurate timing verification and test ..."

Kaushik Roy, Jacob A. Abraham (1991)

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DOI: 10.1109/4.84939

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type: Journal Article

metadata version: 2025-02-26

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Kaushik Roy, Jacob A. Abraham:
The use of RTL descriptions in accurate timing verification and test generation (VLSI). IEEE J. Solid State Circuits 26(9): 1230-1239 (1991)

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