"A CMOS model for computer-aided circuit analysis and design."

James W. Roberts, Savvas G. Chamberlain (1989)

> Home

Details and statistics

DOI: 10.1109/4.16312

access: closed

type: Journal Article

metadata version: 2024-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/RobertsC89
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/RobertsC89
James W. Roberts, Savvas G. Chamberlain:
A CMOS model for computer-aided circuit analysis and design. IEEE J. Solid State Circuits 24(1): 128-138 (1989)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.