"Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM."

Yoshinobu Nakagome et al. (1991)

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DOI: 10.1109/4.92020

access: closed

type: Journal Article

metadata version: 2025-02-26

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Yoshinobu Nakagome, Kiyoo Itoh, Kan Takeuchi, Eiji Kume, Hitoshi Tanaka, Masanori Isoda, Tatsunori Musha, Toru Kaga, Teruaki Kisu, Takashi Nishida, Yoshifumi Kawamoto, Masakazu Aoki:
Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM. IEEE J. Solid State Circuits 26(7): 1003-1010 (1991)

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