"A Josephson 4 bit RALU for a prototype computer."

Hiroshi Nakagawa et al. (1989)

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DOI: 10.1109/4.34095

access: closed

type: Journal Article

metadata version: 2024-11-12

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Hiroshi Nakagawa, Shin Kosaka, Hiroki Kawamura, Itaru Kurosawa, Masahiro Aoyagi, Youichi Hamazaki, Yoshikuni Okada, Susumu Takada:
A Josephson 4 bit RALU for a prototype computer. IEEE J. Solid State Circuits 24(4): 1076-1084 (1989)

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