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"A 14-bit 100-Msample/s subranging ADC."

Carl Moreland et al. (2000)

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DOI: 10.1109/4.890292

access: closed

type: Journal Article

metadata version: 2022-04-08

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  - journals/jssc/MorelandMEYHS00
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  - https://dblp.org/rec/journals/jssc/MorelandMEYHS00
Carl Moreland, Frank Murden, Michael Elliott, Joe Young, Mike Hensley, Russell Stop:
A 14-bit 100-Msample/s subranging ADC. IEEE J. Solid State Circuits 35(12): 1791-1798 (2000)

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