"A multibit test trigger circuit for megabit SRAMs."

Fumio Miyaji et al. (1990)

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DOI: 10.1109/4.50286

access: closed

type: Journal Article

metadata version: 2025-01-23

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Fumio Miyaji, Takashi Emori, Yasushi Matsuyama, Yoshikazu Kanaishi, Katsunori Seno, Yoshiaki Hagiwara:
A multibit test trigger circuit for megabit SRAMs. IEEE J. Solid State Circuits 25(1): 68-71 (1990)

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