"Design and Analysis of Low-Voltage Low-Parasitic ESD Protection for RF ICs ..."

Jian Liu et al. (2011)

> Home

Details and statistics

DOI: 10.1109/JSSC.2011.2118290

access: closed

type: Journal Article

metadata version: 2020-11-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/LiuWZFWLTFZWW11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/LiuWZFWLTFZWW11
Jian Liu, Xin Wang, Hui Zhao, Qiang Fang, Albert Z. Wang, Lin Lin, He Tang, Siqiang Fan, Bin Zhao, Shi-Jie Wen, Richard Wong:
Design and Analysis of Low-Voltage Low-Parasitic ESD Protection for RF ICs in CMOS. IEEE J. Solid State Circuits 46(5): 1100-1110 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.