"Simulating the complexity of regular VLSI layout."

Yu-Ying J. Leung, Michael A. Shanblatt (1988)

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DOI: 10.1109/4.284

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type: Journal Article

metadata version: 2024-11-05

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Yu-Ying J. Leung, Michael A. Shanblatt:
Simulating the complexity of regular VLSI layout. IEEE J. Solid State Circuits 23(1): 239-244 (1988)

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