"A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With ..."

Martin Kramer et al. (2015)

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DOI: 10.1109/JSSC.2015.2463110

access: closed

type: Journal Article

metadata version: 2020-08-30

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Martin Kramer, Erwin Janssen, Kostas Doris, Boris Murmann:
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS. IEEE J. Solid State Circuits 50(12): 2891-2900 (2015)

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