"A 40-MFLOPS 32-bit floating-point processor with elastic pipeline scheme."

Shinji Komori et al. (1989)

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DOI: 10.1109/JSSC.1989.572611

access: closed

type: Journal Article

metadata version: 2024-11-12

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Shinji Komori, Hidehiro Takata, Todhixuki Tamura, Fumixsdu Asai, Takio Ohno, Osamu Tomisawa, Tetsuo Yamasaki, Kenji Shima, Hiroaki Nishikawa, Hiroaki Terada:
A 40-MFLOPS 32-bit floating-point processor with elastic pipeline scheme. IEEE J. Solid State Circuits 24(5): 1341-1347 (1989)

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