"Design Considerations for a 11.3 Gbit/s SiGe Bipolar Driver Array With a 5 ..."

Horst Hettrich, Michael Möller (2016)

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DOI: 10.1109/JSSC.2016.2569075

access: closed

type: Journal Article

metadata version: 2020-08-30

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Horst Hettrich, Michael Möller:
Design Considerations for a 11.3 Gbit/s SiGe Bipolar Driver Array With a 5 × 6 V_pp Chip-to-Chip Bondwire Output to an MZM PIC. IEEE J. Solid State Circuits 51(9): 2006-2014 (2016)

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