"The SDC cell-A novel design methodology for high-speed arithmetic modules ..."

Takehisa Hayashi et al. (1990)

> Home

Details and statistics

DOI: 10.1109/4.52163

access: closed

type: Journal Article

metadata version: 2025-01-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/HayashiDAISWS90
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/HayashiDAISWS90
Takehisa Hayashi, Toshio Doi, Mitsuo Asai, Kenichi Ishibashi, Shoji Shukuri, Atsuo Watanabe, Makoto Suzuki:
The SDC cell-A novel design methodology for high-speed arithmetic modules using CMOS/BiCMOS precharged circuits. IEEE J. Solid State Circuits 25(2): 403-409 (1990)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.