"A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm2 Double-Pumping 1-Read and ..."

Masaru Haraguchi et al. (2025)

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DOI: 10.1109/JSSC.2024.3509958

access: closed

type: Journal Article

metadata version: 2025-02-13

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Masaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang:
A 3 nm-FinFET 4.3 GHz 21.1 Mb/mm² Double-Pumping 1-Read and 1-Write Psuedo-2-Port SRAM With a Folded Bitline Multi-Bank Architecture. IEEE J. Solid State Circuits 60(1): 197-204 (2025)

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