"Clock Multiplication Techniques Using Digital Multiplying Delay-Locked Loops."

Amr Elshazly et al. (2013)

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DOI: 10.1109/JSSC.2013.2254552

access: closed

type: Journal Article

metadata version: 2020-08-30

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Amr Elshazly, Rajesh Inti, Brian Young, Pavan Kumar Hanumolu:
Clock Multiplication Techniques Using Digital Multiplying Delay-Locked Loops. IEEE J. Solid State Circuits 48(6): 1416-1428 (2013)

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