"Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open ..."

Ahmed Elkholy et al. (2018)

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DOI: 10.1109/JSSC.2018.2817602

access: closed

type: Journal Article

metadata version: 2020-08-30

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Ahmed Elkholy, Saurabh Saxena, Guanghua Shu, Amr Elshazly, Pavan Kumar Hanumolu:
Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers. IEEE J. Solid State Circuits 53(6): 1806-1817 (2018)

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