"Regular VLSI architectures for multiplication modulo (2/sup n/+1)."

Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin (1991)

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DOI: 10.1109/4.92018

access: closed

type: Journal Article

metadata version: 2025-02-26

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Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin:
Regular VLSI architectures for multiplication modulo (2/sup n/+1). IEEE J. Solid State Circuits 26(7): 990-994 (1991)

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