"50-250 MHz ΔΣ DLL for Clock Synchronization."

San-Jeow Cheng et al. (2010)

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DOI: 10.1109/JSSC.2010.2072591

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type: Journal Article

metadata version: 2020-08-30

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San-Jeow Cheng, Lin Qiu, Yuanjin Zheng, Chun-Huat Heng:
50-250 MHz ΔΣ DLL for Clock Synchronization. IEEE J. Solid State Circuits 45(11): 2445-2456 (2010)

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