"A 1.8-V GPIO With Design-Technology-Reliability Co-Optimization in ..."

Wen-Chieh Chen et al. (2025)

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DOI: 10.1109/JSSC.2024.3424264

access: closed

type: Journal Article

metadata version: 2025-02-13

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Wen-Chieh Chen, Shih-Hung Chen, Man-Ching Huang, Shu-Wei Chang, Geert Hellings, Guido Groeseneken:
A 1.8-V GPIO With Design-Technology-Reliability Co-Optimization in Sub-3-nm GAA-NS Technology. IEEE J. Solid State Circuits 60(2): 615-625 (2025)

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