"A low-jitter PLL clock generator for microprocessors with lock range of ..."

David W. Boerstler (1999)

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DOI: 10.1109/4.753684

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type: Journal Article

metadata version: 2022-07-05

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David W. Boerstler:
A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHz. IEEE J. Solid State Circuits 34(4): 513-519 (1999)

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