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"A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control ..."
Kazutami Arimoto et al. (2007)
- Kazutami Arimoto, Fukashi Morishita
, Isamu Hayashi, Katsumi Dosaka, Hiroki Shimano, Takashi Ipposhi:
A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs. IEEE J. Solid State Circuits 42(11): 2611-2619 (2007)
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