"Scalable 0.35 V to 1.2 V SRAM Bitcell Design From 65 nm CMOS to 28 nm FDSOI."

Fady Abouzeid et al. (2014)

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DOI: 10.1109/JSSC.2014.2316219

access: closed

type: Journal Article

metadata version: 2022-04-09

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Fady Abouzeid, Audrey Bienfait, Kaya Can Akyel, Anis Feki, Sylvain Clerc, Lorenzo Ciampolini, Fabien Giner, Robin Wilson, Philippe Roche:
Scalable 0.35 V to 1.2 V SRAM Bitcell Design From 65 nm CMOS to 28 nm FDSOI. IEEE J. Solid State Circuits 49(7): 1499-1505 (2014)

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