"Efficient bit-level systolic array implementation of FIR and IIR digital ..."

Chin-Liang Wang, Che-Ho Wei, Sin-Horng Chen (1988)

> Home

Details and statistics

DOI: 10.1109/49.1916

access: closed

type: Journal Article

metadata version: 2020-04-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jsac/WangWC88
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jsac/WangWC88
Chin-Liang Wang, Che-Ho Wei, Sin-Horng Chen:
Efficient bit-level systolic array implementation of FIR and IIR digital filters. IEEE J. Sel. Areas Commun. 6(3): 484-483 (1988)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.