"A DBT-based VLSI systolic architecture for hard squared error clustering."

Emilio L. Zapata, Ramón Doallo, Senén Barro (1989)

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DOI: 10.1016/0165-6074(89)90063-X

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type: Journal Article

metadata version: 2022-10-04

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Emilio L. Zapata, Ramón Doallo, Senén Barro:
A DBT-based VLSI systolic architecture for hard squared error clustering. Microprocessing and Microprogramming 27(1-5): 299-305 (1989)

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