"Performance evaluation of a bus-based multistage multiprocessor architecture."

Andreas A. Veglis, Andreas S. Pombortsis, Efstathios Papaefstathiou (2000)

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DOI: 10.1016/S1383-7621(98)00061-7

access: closed

type: Journal Article

metadata version: 2020-06-15

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Andreas A. Veglis, Andreas S. Pombortsis, Efstathios Papaefstathiou:
Performance evaluation of a bus-based multistage multiprocessor architecture. J. Syst. Archit. 46(1): 39-47 (2000)

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