"Cache-based high-level simulation of microthreaded many-core architectures."

Muhammad Irfan Uddin, Raphael Poss, Chris R. Jesshope (2014)

> Home

Details and statistics

DOI: 10.1016/J.SYSARC.2014.05.003

access: closed

type: Journal Article

metadata version: 2021-01-11

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jsa/UddinPJ14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jsa/UddinPJ14
Muhammad Irfan Uddin, Raphael Poss, Chris R. Jesshope:
Cache-based high-level simulation of microthreaded many-core architectures. J. Syst. Archit. 60(7): 529-552 (2014)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.