"High-level synthesis for FPGAs: code optimization strategies for real-time ..."

Chao Li et al. (2018)

> Home

Details and statistics

DOI: 10.1007/S11554-017-0722-3

access: closed

type: Journal Article

metadata version: 2020-06-18

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jrtip/LiBBGY18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jrtip/LiBBGY18
Chao Li, Yanjing Bi, Yannick Benezeth, Dominique Ginhac, Fan Yang:
High-level synthesis for FPGAs: code optimization strategies for real-time image processing. J. Real Time Image Process. 14(3): 701-712 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.