Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Cache simulation for irregular memory traffic on multi-core CPUs: Case ..."

James D. Trotter, Johannes Langguth, Xing Cai (2020)

> Home

Details and statistics

DOI: 10.1016/J.JPDC.2020.05.020

access: closed

type: Journal Article

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jpdc/TrotterLC20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jpdc/TrotterLC20
James D. Trotter, Johannes Langguth, Xing Cai:
Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix-vector multiplication. J. Parallel Distributed Comput. 144: 189-205 (2020)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.