"A Decomposition Workflow for Integrated Circuit Verification and Validation."

Adam G. Kimura et al. (2020)

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DOI: 10.1007/S41635-019-00086-6

access: closed

type: Journal Article

metadata version: 2023-08-28

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  - https://dblp.org/rec/journals/jhss/KimuraSSSESV20
Adam G. Kimura, Jon Scholl, James Schaffranek, Matthew Sutter, Andrew Elliott, Mike Strizich, Glen David Via:
A Decomposition Workflow for Integrated Circuit Verification and Validation. J. Hardw. Syst. Secur. 4(1): 34-43 (2020)

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