"State Assignment for Realizing Modular Input-Free Sequential Logical ..."

Svetlana P. Kartashev (1973)

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DOI: 10.1016/S0022-0000(73)80007-8

access: open

type: Journal Article

metadata version: 2021-02-16

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Svetlana P. Kartashev:
State Assignment for Realizing Modular Input-Free Sequential Logical Networks Without Invertors. J. Comput. Syst. Sci. 7(5): 522-542 (1973)

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