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"A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs."

Young San Shin et al. (2011)

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DOI: 10.1142/S021812661100758X

access: closed

type: Journal Article

metadata version: 2020-08-25

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  - journals/jcsc/ShinWHLKS11
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  - https://dblp.org/rec/journals/jcsc/ShinWHLKS11
Young San Shin, Jae-Kyung Wee, Jong-Chan Ha, Ji-Hoon Lim, Yong-Ju Kim, Young-Sang Son:
A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. J. Circuits Syst. Comput. 20(4): 741-756 (2011)

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