"Design of Low Power VLSI Circuits Using Two Phase Adiabatic Dynamic Logic ..."

P. Sasipriya, V. S. Kanchana Bhaaskaran (2018)

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DOI: 10.1142/S0218126618500524

access: closed

type: Journal Article

metadata version: 2020-08-25

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P. Sasipriya, V. S. Kanchana Bhaaskaran:
Design of Low Power VLSI Circuits Using Two Phase Adiabatic Dynamic Logic (2PADL). J. Circuits Syst. Comput. 27(4): 1850052:1-1850052:22 (2018)

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