Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Design and Implementation of QCA D-Flip-Flops and RAM Cell Using Majority ..."

Trailokya Nath Sasamal, Ashutosh Kumar Singh, Umesh Ghanekar (2019)

> Home

Details and statistics

DOI: 10.1142/S0218126619500798

access: closed

type: Journal Article

metadata version: 2022-07-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jcsc/SasamalSG19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jcsc/SasamalSG19
Trailokya Nath Sasamal, Ashutosh Kumar Singh, Umesh Ghanekar:
Design and Implementation of QCA D-Flip-Flops and RAM Cell Using Majority Gates. J. Circuits Syst. Comput. 28(5): 1950079:1-1950079:20 (2019)

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.