"FPGA-Based Pipelined Architecture for Real-Time Estimation of Sensitivity ..."

Tooba Khan, Muhammad Faisal Siddiqui, Hammad Omer (2020)

> Home

Details and statistics

DOI: 10.1142/S021812662050125X

access: closed

type: Journal Article

metadata version: 2020-08-25

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jcsc/KhanSO20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jcsc/KhanSO20
Tooba Khan, Muhammad Faisal Siddiqui, Hammad Omer:
FPGA-Based Pipelined Architecture for Real-Time Estimation of Sensitivity Maps Using Pre-Scan Method in Parallel MRI. J. Circuits Syst. Comput. 29(8): 2050125:1-2050125:19 (2020)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.