"FPGA-Based ROI Encoding for HEVC Video Bitrate Reduction."

Zhilei Chai et al. (2020)

> Home

Details and statistics

DOI: 10.1142/S0218126620501820

access: closed

type: Journal Article

metadata version: 2024-12-09

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jcsc/ChaiLHCC20
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jcsc/ChaiLHCC20
Zhilei Chai, Shen Li, Qunfang He, Mingsong Chen, Wenjie Chen:
FPGA-Based ROI Encoding for HEVC Video Bitrate Reduction. J. Circuits Syst. Comput. 29(11): 2050182:1-2050182:17 (2020)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.