"An efficient multiplier-less architecture for 2-D convolution with ..."

Ming Z. Zhang, Vijayan K. Asari (2007)

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DOI: 10.1016/J.VLSI.2006.07.001

access: closed

type: Journal Article

metadata version: 2020-02-20

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Ming Z. Zhang, Vijayan K. Asari:
An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels. Integr. 40(4): 490-502 (2007)

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