"Assignment of inter-die signals in a simplified wiring model for ..."

Jin-Tai Yan (2015)

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DOI: 10.1016/J.VLSI.2014.12.007

access: closed

type: Journal Article

metadata version: 2022-04-09

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Jin-Tai Yan:
Assignment of inter-die signals in a simplified wiring model for die-stacking SiP designs. Integr. 49: 78-86 (2015)

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