"An algorithm for optimal two-dimensional compaction of VLSI layouts."

Martine D. F. Schlag, Yuh-Zen Liao, C. K. Wong (1983)

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DOI: 10.1016/S0167-9260(83)80019-4

access: closed

type: Journal Article

metadata version: 2020-02-20

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Martine D. F. Schlag, Yuh-Zen Liao, C. K. Wong:
An algorithm for optimal two-dimensional compaction of VLSI layouts. Integr. 1(2-3): 179-209 (1983)

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