"Dual-rail asynchronous logic multi-level implementation."

Igor Lemberski, Petr Fiser (2014)

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DOI: 10.1016/J.VLSI.2013.02.002

access: closed

type: Journal Article

metadata version: 2020-02-20

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Igor Lemberski, Petr Fiser:
Dual-rail asynchronous logic multi-level implementation. Integr. 47(1): 148-159 (2014)

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