"Yield optimization in wafer scale circuits with hierarchical redundancies."

J. S. T. Huang, J. M. Daughton (1986)

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DOI: 10.1016/0167-9260(86)90036-2

access: closed

type: Journal Article

metadata version: 2020-02-20

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J. S. T. Huang, J. M. Daughton:
Yield optimization in wafer scale circuits with hierarchical redundancies. Integr. 4(1): 43-51 (1986)

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