"Minimizing detection-to-boosting latency toward low-power error-resilient ..."

Chih-Cheng Hsu, Masanori Hashimoto, Mark Po-Hung Lin (2017)

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DOI: 10.1016/J.VLSI.2017.01.002

access: closed

type: Journal Article

metadata version: 2023-11-12

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Chih-Cheng Hsu, Masanori Hashimoto, Mark Po-Hung Lin:
Minimizing detection-to-boosting latency toward low-power error-resilient circuits. Integr. 58: 236-244 (2017)

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