"SoC interconnection protection through formal verification."

Jiaji He et al. (2019)

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DOI: 10.1016/J.VLSI.2018.09.007

access: closed

type: Journal Article

metadata version: 2020-02-20

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Jiaji He, Xiaolong Guo, Travis Meade, Raj Gautam Dutta, Yiqiang Zhao, Yier Jin:
SoC interconnection protection through formal verification. Integr. 64: 143-151 (2019)

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