"Minimized Memory Architecture for Low Latency Viterbi Decoder Using ..."

C. Arun, V. Rajamani (2007)

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DOI: 10.1142/S0219799507000667

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type: Journal Article

metadata version: 2020-03-31

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C. Arun, V. Rajamani:
Minimized Memory Architecture for Low Latency Viterbi Decoder Using Zig-Zag Algorithm. Int. J. Wirel. Opt. Commun. 4(3): 313-323 (2007)

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