"Design of implicit pulsed-dual edge triggering flip flop for low power and ..."

P. Nagarajan, N. Ashok Kumar, P. Venkat Ramana (2020)

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DOI: 10.1142/S0219691319410091

access: closed

type: Journal Article

metadata version: 2021-02-26

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P. Nagarajan, N. Ashok Kumar, P. Venkat Ramana:
Design of implicit pulsed-dual edge triggering flip flop for low power and high speed clocking systems. Int. J. Wavelets Multiresolution Inf. Process. 18(1): 1941009:1-1941009:19 (2020)

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